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NixOS RISC-V

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NixOS on RISC-V https://wiki.nixos.org/wiki/RISC-V https://pad.lassul.us/NixOS-riscv64-linux https://github.com/orgs/NixOS/teams/risc-v70 Servers

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18 Feb 2024
@nickcao:nichi.coNick CaoThe problem is not about splicing but it checking for the wrong pkg-config binary.03:53:00
@nickcao:nichi.coNick CaoIt shall be riscv64-unknown-linux-gnu-pkg-config03:53:13
@nickcao:nichi.coNick Cao(This won't completely fix cross compilation either, there are still other issues like: https://github.com/neutrinolabs/xrdp/issues/1292)03:53:39
@nickcao:nichi.coNick CaoIf you really want some decent remote desktop experience, I would recommend wayvnc (or others), rather than this poorly packaged xrdp.03:54:27
@SeTSeR:matrix.orgWhite Whale Thanks, I’ll try wayvnc. I also tried TigerVNC, but it also fails, trying to run the wrong gettext, hope `wayvnc` will work 08:17:35
@SeTSeR:matrix.orgWhite Whale I also encountered a kernel panic on upstream kernel:
https://github.com/starfive-tech/linux/issues/132
I was able to stable reproduce this on any nix-related command, so I’m currently unable to use nix on my machine. For a long time I used 5.15 kernel from old `devel` branch, but after update of default GCC to 13 I was unable to boot this kernel, as the old kernel doesn’t seem to support modules built by new GCC. I think I can set old compiler for kernel explicitly, but maybe there is a way to debug this kernel panic?

The problem seems to be very old, I think I tried to switch to upstream kernel from the start of my journey with VF2, and on every attempt I encountered this panic.
10:18:09
@SeTSeR:matrix.orgWhite Whale Sometimes I ran into this problem just by running soulseek client or fsck on incorrectly shut down drive 10:20:23
19 Feb 2024
@zebreus:zebre.uszebreus changed their display name from zebreus to zebreuss.02:27:58
@zebreus:zebre.uszebreus changed their display name from zebreuss to zebreus.02:28:28
* @skeuchel:matrix.orgSteven Keuchel is trying to get milkv pioneer into nixos-hardware https://github.com/sophgo/bootloader-riscv/issues/7210:28:18
@thefossguy:matrix.orgPratham Patel (you can mention me)FYI: Please don't use the Pioneer or the Lichee 4A in any of the build machines. The C<something> cores from T-Head have hardware erratas about incorrect Atomic implementation and it should only be used for "oh cool thing" instad of a build machine.10:37:32
@thefossguy:matrix.orgPratham Patel (you can mention me)Also, the above "PSA" was for using these machines for building nixpkgs. Not against their inclusion in nixos-hardware :)10:54:37
@thefossguy:matrix.orgPratham Patel (you can mention me)So far, the only machines I trust for building nixpkgs are the HiFive Unmatched and the VisionFive 2.10:55:27
@thefossguy:matrix.orgPratham Patel (you can mention me) Might add the Milk-V Oasis to that list once it's launched, since it uses SiFive's cores (which I trust to have no major issues), but only after testing things out :) 10:56:12
@skeuchel:matrix.orgSteven KeuchelDo you have any specific silicon erratas you are referring to? I'm only interested in those that impact user-mode functionality, rather than being solely kernel-mode concerns. I know about the linux ERRATA_THEAD_QSPINLOCK, but I would like to know about others, if they exist. The information is a bit hard to find.11:35:18
@thefossguy:matrix.orgPratham Patel (you can mention me) All the RISC-V related erratas that I know: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/riscv/include/asm/errata_list.h 11:38:14
@skeuchel:matrix.orgSteven Keuchelahh ok. as far as i understand it, the current erratas in upstream linux do not affect user-mode.11:44:43
@skeuchel:matrix.orgSteven Keuchelbut correct me if i'm wrong, I would really like to know ;)11:44:55
@thefossguy:matrix.orgPratham Patel (you can mention me)that's for the core though, pretty sure both kernel-space and user-space are affected11:45:17
@thefossguy:matrix.orgPratham Patel (you can mention me)also, these erratas are errors in implementing the RISC-V spec in the actual Linux-capable core, individual or on SoC11:50:05
@thefossguy:matrix.orgPratham Patel (you can mention me) That said, I do wish to buy that Lichee 4A cluster board with 7 slots so I can parallel build to check for build failures since we're still bootstrapping. Once a build succeeds, I'd build it on the VF2 that I own. 11:54:03
@skeuchel:matrix.orgSteven Keuchel
In reply to @thefossguy:matrix.org
also, these erratas are errors in implementing the RISC-V spec in the actual Linux-capable core, individual or on SoC

Yes, the behaviour may differ from the official spec, but you still have to consider the impact.

  • ERRATA_THEAD_PBMT is about page tables, it's kernel-mode specific
  • ERRATA_THEAD_PMU is about performance counter overflows
  • ERRATA_THEAD_CMO I don't understand enough, but you can also disable those extensions
  • ERRATA_THEAD_QSPINLOCK is a case where the vendor implementation is more restricted than what the spec requires
    So the question is if these warrant not trusting the machines as build boxes. For me, these erratas are not major issues.
12:15:49
@skeuchel:matrix.orgSteven KeuchelThat being said, I would trust none of these as production machines for a database or something.12:16:06
@skeuchel:matrix.orgSteven KeuchelFor the pioneer: the sg2042-dev vendor kernel is not stable, and the PCIe support is a bit wonky which I would consider as a bigger issue at this point. But hopefully those can be resolved.12:17:20
@thefossguy:matrix.orgPratham Patel (you can mention me)Agreed, while the kernel does handle most of this to have workarounds, they're exactly what they are, workarounds. :)12:36:35
@sorear:matrix.orgsorearthe pioneer exhibits extremely bad performance for some multithreaded workloads, there was some speculation that it's caused by ERRATA_THEAD_WRITE_ONCE but experiments were inconclusive13:22:40
@sorear:matrix.orgsoreart-head has a userspace erratum where the FP underflow flag is incorrectly not set if a multiply rounds away from zero to produce the smallest normal number, AFAIK the only thing this affects is the glibc regression test suite13:23:49
@thefossguy:matrix.orgPratham Patel (you can mention me) That's because it's not a serious chip (not in a negative sense). It's an experiment on checking what works instead of making it work "correctly". Like a lot of first-gen products, it's a flex of "can we do this?" without the "nicely" part. 13:24:18
@sorear:matrix.orgsoreart-head cores do not allow vector loads/stores to strongly ordered (I/O) memory, so no memcpy to frame buffers13:24:43
@thefossguy:matrix.orgPratham Patel (you can mention me)Their vector is also sorta custom and/or 0.7.113:25:23

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