| 8 Mar 2026 |
|  Slushee changed their profile picture. | 00:28:01 |
 JamieMagee | Preorders for the DC-ROMA III are up 👀
https://store.deepcomputing.io/products/dc-roma-risc-v-mainboard-iii-for-framework-laptop-13-early-access-program | 23:27:56 |
|  SomeoneSerge (matrix works sometimes) changed their display name from SomeoneSerge (back on matrix) to SomeoneSerge (matrix works sometimes). | 23:31:15 |
| 9 Mar 2026 |
|  @artemist:mildlyfunctional.gay left the room. | 03:11:58 |
 Tristan Ross | Oh yeah, the ROMA III is on pre-order. The CEO of DeepComputing, Yuning Liang, was at Planet Nix. We gave a talk, TLDR: pre-silicon mainlining to help out making it easier to run NixOS on hardware they produce. | 04:53:53 |
 dramforever | never heard of Liang doing upstreaming. what did they say? | 04:55:55 |
| dramforever | isn't k3 upstreaming done by mainly spacemit employees? | 04:56:43 |
| dramforever | and dlan | 04:56:48 |
| Tristan Ross | Idk how the upstreaming will be done but I just know that the upstreaming is pre-silicon | 04:57:09 |
| dramforever | i guess also inochi for the ethernet thing | 04:57:15 |
| Tristan Ross | Yuning is also working on a RISC-V GPU that uses llvmpipe | 04:57:24 |
| dramforever | how pre is pre-silicon | 04:57:30 |
| Tristan Ross | Idk | 04:57:36 |
| Tristan Ross | At least before people can get their hands on it afaik | 04:57:54 |
| Tristan Ross | I can definitely ask though | 04:59:58 |
| dramforever | i'm not hopeful | 05:00:11 |
| dramforever | re: the llvmpipe gpu thing | 05:00:25 |
| dramforever | the eic7702x laptop was advertised to have 512 "byte" [sic] rvv supposedly using the dsp cores or something, and that never delivered because there was no way it's gonna work | 05:01:33 |
| dramforever | tbh i don't like how Yuning Liang is apparently becoming the face in the riscv community for other people's contributions | 05:06:31 |
| dramforever | and/or undeliverable promises | 05:08:14 |
| 11 Mar 2026 |
| JamieMagee | I'm not sure if there are long-term plans for RISC-V builders on hydra, but I found some notes from a Fedora maintainer working on their RISC-V port:
https://marcin.juszkiewicz.com.pl/2026/03/10/risc-v-is-sloooow/ | 00:24:22 |
 hexa | once beefy rv23a hit | 00:24:48 |
| hexa | we have an offer for acces to Spacemit K3 hardware too | 00:26:24 |
| hexa | * we have an offer for access to Spacemit K3 hardware too | 00:26:28 |
| hexa | I have just doubts its worth it | 00:26:32 |
| dramforever | hydra.nixos.org no, unofficial native riscv hydra running less frequent evals is starting to become viable | 00:30:01 |
| dramforever | also beefy is good for perf, rva23 ... it's limited | 00:30:34 |
| dramforever | notthe most representative but on reddit on coremark they got -30% perf improvement adding vectors on k3. yes that's negative thirty percent, a downgrade | 00:31:57 |
| JamieMagee | That sounds somewhat promising. | 00:34:45 |
| JamieMagee | I tried running hydra using QEMU for RISC-V support, and ran headfirst into: https://github.com/NixOS/nixpkgs/issues/460825#issuecomment-3994959331
TL;DR RISC-V bootstrap binutils is predates support for zca, while GCC 15 now implies support for zca :/ | 00:39:27 |
