NixOS RISC-V | 232 Members | |
| NixOS on RISC-V https://wiki.nixos.org/wiki/RISC-V https://pad.lassul.us/NixOS-riscv64-linux https://github.com/orgs/NixOS/teams/risc-v | 70 Servers |
| Sender | Message | Time |
|---|---|---|
| 8 Apr 2024 | ||
Yes, those typecode UUIDs for partition 1 and 2 are necessary. | 09:39:15 | |
| i usually never go back to vendor docs once upstreaming starts :) | 09:39:54 | |
| I'm quite thankful that they at least have some documentation. Not everyone wants to read Linux kernel code and dts files to figure out where the UART device and SRAM are. | 09:42:10 | |
| They ought to have at least this much provided | 09:42:36 | |
| They have a (nearly) complete description of the entire physical memory map. If only I could remember which document it's in... | 09:43:17 | |
| Yeah, JH7110 is surprisingly "open". | 09:43:44 | |
| Here it is: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/system_memory_map.html | 09:44:09 | |
In reply to @alex:tunstall.xyzI was usually also compiling something else. I think the registerised ones are more accurate. | 09:58:10 | |
In reply to @alex:tunstall.xyzyes exactly, you need https://gitlab.haskell.org/ghc/ghc/-/merge_requests/10714 and https://gitlab.haskell.org/ghc/ghc/-/merge_requests/12286 | 09:59:04 | |
| I wanted to create a nixpkgs PR once the the second one is merged upstream. | 09:59:53 | |
| be careful though, one has to be added to the hadrian derivation and the other to the ghc derivation | 10:00:31 | |
| Well damn, I'm already 3h into a build with both on the GHC derivation ๐ I assume your Hadrian PR goes into the Hadrian derivation? | 10:01:49 | |
| here is the part of my overlay that does this
| 10:02:15 | |
| Your hash for 10714 doesn't match mine... Is that commit still fetchable? | 10:05:17 | |
| grr, I hate fetchpatch | 10:05:58 | |
| let me gc and try to fix it | 10:06:08 | |
| I'm fetching the entire MR, so that might be why (but the other one matches) | 10:08:12 | |
| Yep, build fails with your hash. Correct one is sha256-uonXubXjMywSbUe/p2HLIWXDpwLWHlpZDMBvDnr/Utc= | 10:14:13 | |
Oh wait, I was missing stripLen. Nevermind. | 10:17:10 | |
| oh ok :D I had it as a file before and switched to fetchpatch before posting | 10:26:13 | |
| hope it works now | 10:26:34 | |
| 9 Apr 2024 | ||
| sorear: https://www.theregister.com/2024/04/09/sifive_riscv_hifive/ | 07:02:44 | |
| 13:23:23 | ||
| i'm surprised you haven't dealt with zeromq, because nix why-depends says systemd depends on it : | 21:09:15 | |
| 21:09:27 | ||
| Why? Is there something wrong with zeromq on RISC-V? I don't seem to have a fix for it and my full system rebuild is complete, so it should work fine. | 21:59:50 | |
| Download zeromq-log.txt | 22:11:14 | |
| won't build for me on qemu | 22:12:42 | |
| 23:12:30 | ||
| 10 Apr 2024 | ||
| misuzu: is there any reason why you are using the vendor kernel? AFAIK, everything but PCIe (for a headless build box) has been merged upstream. Or did I just answer myself with "PCIe isn't yet in upstream?" | 02:10:37 | |