NixOS RISC-V | 231 Members | |
| NixOS on RISC-V https://wiki.nixos.org/wiki/RISC-V https://pad.lassul.us/NixOS-riscv64-linux https://github.com/orgs/NixOS/teams/risc-v | 69 Servers |
| Sender | Message | Time |
|---|---|---|
| 8 Apr 2024 | ||
| that way, you an keep the SPI intact and experiment by keeping opensbi and uboot on the SD/eMMC | 08:43:21 | |
In reply to @thefossguy:matrix.orgi was still on the bootloader on emmc train of thought, i.e. if i want to partition the emmc manually, i suppose i need to flash an image with opensbi and u-boot first, or do i have to build a whole system image then resize | 08:43:40 | |
| you can partition it manually and flash both components individually :) | 08:45:32 | |
| 08:48:20 | ||
| thanks, i found the expected layout for sdio here: https://hill9.org/journal/2023/08/08/risc-v-debian-ubuntu-and-fedora-linux-on-visionfive-2/ | 08:58:36 | |
| hmmm weird partion 1 and 2 here are half-ish the size of the one in arch's script | 09:02:04 | |
| This can also be found in the vendor's official documentation: https://doc-en.rvspace.org/VisionFive2/Boot_UG/JH7110_SDK/boot_address_allocation.html Now whether or not those offsets are important is still unknown. | 09:34:00 | |
| The official documentation is also missing one critical detail: the partition type IDs. | 09:35:38 | |
| thanks! | 09:37:28 | |
In reply to @alex:tunstall.xyzdo you mean these? https://docs.u-boot.org/en/latest/board/starfive/visionfive2.html#flashing | 09:38:33 | |
Yes, those typecode UUIDs for partition 1 and 2 are necessary. | 09:39:15 | |
| i usually never go back to vendor docs once upstreaming starts :) | 09:39:54 | |
| I'm quite thankful that they at least have some documentation. Not everyone wants to read Linux kernel code and dts files to figure out where the UART device and SRAM are. | 09:42:10 | |
| They ought to have at least this much provided | 09:42:36 | |
| They have a (nearly) complete description of the entire physical memory map. If only I could remember which document it's in... | 09:43:17 | |
| Yeah, JH7110 is surprisingly "open". | 09:43:44 | |
| Here it is: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/system_memory_map.html | 09:44:09 | |
In reply to @alex:tunstall.xyzI was usually also compiling something else. I think the registerised ones are more accurate. | 09:58:10 | |
In reply to @alex:tunstall.xyzyes exactly, you need https://gitlab.haskell.org/ghc/ghc/-/merge_requests/10714 and https://gitlab.haskell.org/ghc/ghc/-/merge_requests/12286 | 09:59:04 | |
| I wanted to create a nixpkgs PR once the the second one is merged upstream. | 09:59:53 | |
| be careful though, one has to be added to the hadrian derivation and the other to the ghc derivation | 10:00:31 | |
| Well damn, I'm already 3h into a build with both on the GHC derivation 🙃 I assume your Hadrian PR goes into the Hadrian derivation? | 10:01:49 | |
| here is the part of my overlay that does this
| 10:02:15 | |
| Your hash for 10714 doesn't match mine... Is that commit still fetchable? | 10:05:17 | |
| grr, I hate fetchpatch | 10:05:58 | |
| let me gc and try to fix it | 10:06:08 | |
| I'm fetching the entire MR, so that might be why (but the other one matches) | 10:08:12 | |
| Yep, build fails with your hash. Correct one is sha256-uonXubXjMywSbUe/p2HLIWXDpwLWHlpZDMBvDnr/Utc= | 10:14:13 | |
Oh wait, I was missing stripLen. Nevermind. | 10:17:10 | |
| oh ok :D I had it as a file before and switched to fetchpatch before posting | 10:26:13 | |