| 10 Apr 2026 |
 cleverca22 | the reason ive looked into this, is because patching the code, requires the code to be r/w, which conflicts with XIP (where the kernel is in a ROM)
XIP risc-v requires an MMU, so it can copy the changes to ram and map them overtop the ROM
except, i wanted XIP linux on a risc-v nommu, which linux just doesnt support! | 12:37:20 |
 GenericNerdyUsername | Could you set the checks to constants at compile time? | 12:38:20 |
 Alex | In reply to @genericnerdyusername:matrix.org
That reminds me, what extensions do the normal riscv linux toolchains assume the processor has? IMACDF_Zicsr_Zifencei | 12:38:28 |
| cleverca22 | last i checked, linux doesnt support that, it always assumes the lack of a feature, and the CONFIG_ just enables support for it
enabling the usage happens at runtime | 12:38:54 |
| cleverca22 | its burried in the alternates macros | 12:39:32 |
| GenericNerdyUsername | Probably would break if you had something that implemented the misa and had no mmu | 12:39:39 |
| GenericNerdyUsername | But thats so esoteric that i think youd have bigger problems | 12:39:51 |
| cleverca22 | arch/riscv/kernel/entry.S: ALTERNATIVE("sfence.vma", "nop", 0, RISCV_ISA_EXT_SVVPTC, 1)
| 12:40:29 |
| GenericNerdyUsername | How much effort would it be to remove the DF requirement or do them in software? | 12:40:32 |
| cleverca22 | basically, this macro will generate 2 different opcodes, and update a table with the address, so other code can patch things at bootup | 12:40:52 |
| Alex | In reply to @genericnerdyusername:matrix.org
How much effort would it be to remove the DF requirement or do them in software? It's not a requirement, just what most toolchains assume.
I think you could probably get away with I_Zicsr for a simple single-core bare metal program.
It would entirely depend on what program you're looking to run. | 12:42:11 |
| cleverca22 | arch/riscv/lib/strcmp.S: __ALTERNATIVE_CFG("nop", "j strcmp_zbb", 0, RISCV_ISA_EXT_ZBB,
IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB))
in this case, it can either be a nop where it falls thru to a non-zbb implementation
or a jump to the zbb implementation
| 12:42:31 |
| cleverca22 | it defaults to the nop case i believe | 12:42:42 |
| GenericNerdyUsername | The end goal is booting a minimal nixos install and running some neofetch derivative | 12:42:57 |
| Alex | In reply to @genericnerdyusername:matrix.org
The end goal is booting a minimal nixos install and running some neofetch derivative You can try different ISAs by setting gcc.arch.
My suggestion: try IMA_Zicsr_Zifencei (you might not need to specify the Zi instructions with GCC) | 12:44:10 |
| GenericNerdyUsername | Set that where? | 12:45:26 |
| cleverca22 | arch/riscv/include/asm/alternative-macros.h
reading more, i can see it will generate the first opcode, nop, and force it to not be compressed (so both options are 32bits)
then it will use an assembly .if statement gated on the config flag, to maybe push the 2nd opcode into the .alternative section of the binary, along with some offsets to the nop | 12:45:26 |
| cleverca22 | oh, but i also see things now gated by CONFIG_RISCV_ALTERNATIVE, hmmmm? | 12:49:04 |
| cleverca22 | ah, when CONFIG_RISCV_ALTERNATIVE=n it just doesnt support the extensions at all, and always goes with the non-zbb case (in the strcmp example) | 12:49:51 |
| cleverca22 | https://github.com/torvalds/linux/blob/master/arch/riscv/Kconfig#L542-L555 | 12:51:54 |
|  josw left the room. | 16:46:54 |
| 13 Apr 2026 |
|  Pol changed their display name from Slushee to Pol. | 14:16:53 |
| 15 Apr 2026 |
|  @98765abc:mozilla.org left the room. | 06:49:36 |
|  zoë (@blokyk) joined the room. | 09:38:46 |
| zoë (@blokyk) | i'm not sure if this is the right place to ask, especially because this is a very noob question, but i'm trying to get a shell for doing cross-compilation from x86 to riscv. I thought it'd be a simple matter of getting a pkgsCross.riscv32.mkShell/stdenv with the right nativeBuildInputs etc, but if i do nix-shell -p pkgsCross.riscv32.stdenv, I just get an x86->x86 toolchain instead of an x86->rv32 one... where's the problem with my mental model, and how can i get a shell with the right environment? | 09:46:07 |
| zoë (@blokyk) | i used this article and this one as sources, but I guess I might have missed or misunderstood something? | 09:47:22 |
| zoë (@blokyk) | * i used this article and this one as sources, but I guess I might h](https://www.hobson.space/posts/nixcross/)ave missed or misunderstood something? | 09:47:47 |
| zoë (@blokyk) | * i used this article and this one as sources, but I guess I might have missed or misunderstood something? | 09:48:05 |
| zoë (@blokyk) | * i used this article and this one as sources, but I guess I must have missed or misunderstood something? | 09:48:14 |
| zoë (@blokyk) | * i used this article and this one as sources, but I guess I must have missed or misunderstood something? | 09:49:44 |
