In reply to @fgaz:matrix.org
DRM under review 👀 https://rvspace.org/en/project/JH7110_Upstream_Plan

gcc is broken in staging

gcc-13.2.0/libgcc/config/riscv/value-unwind.h:32: Error: unrecognized opcode `0xc2202573'

I don't understand why it tries to do that when we set the architecture to riscv64gc

In reply to @fgaz:matrix.org

gcc is broken in staging

gcc-13.2.0/libgcc/config/riscv/value-unwind.h:32: Error: unrecognized opcode `0xc2202573'

I don't understand why it tries to do that when we set the architecture to riscv64gc

NB: According to the RISC-V ISA manual (V20211203), that is a CSRRS instruction on CSR 0xc22, which is a standard read-only unprivileged CSR that hasn't yet been allocated. Whatever is generating that instruction probably should not.

If you don't need CSRs, disabling Zicsr may help.

In reply to @pouspous:matrix.org
Hi guys. I recently bought a Star64 and wanted to try NixOS on it. I cloned https://git.sr.ht/~fgaz/nixos-star64 and added a line networking.wireless.networks."my-wifi" = {}; before running nix build and flashing the result image onto a sd card.
Once the sd card inserted and the Star64 plugged to the power, the usual green light lights up, but no connection is made on the wireless wifi. I have also tried flashing the image onto an eMMC, but to no avail. I don't even know if the system has booted or if it in a stale state or something. Do you know any way to make the light blink once the system is booted ?

In reply to @alex:tunstall.xyz

NB: According to the RISC-V ISA manual (V20211203), that is a CSRRS instruction on CSR 0xc22, which is a standard read-only unprivileged CSR that hasn't yet been allocated. Whatever is generating that instruction probably should not.

If you don't need CSRs, disabling Zicsr may help.

it has been allocated to vlenb in the vector extension.

I think I discovered what happened, our riscv bootstrap files have never been updated so we are stuck with an old assembler that doesn't recognize rvv 1.0 instructions.