| 27 Jun 2025 |
[0x4A6F] | Who wants an invitation to the team? 👋 | 16:08:46 |
dramforever | i have requested | 16:21:15 |
@lotte:chir.rs | i can’t access the link | 16:22:19 |
dramforever | i wonder if you need to be already a member of nixos org or something | 16:27:25 |
@lotte:chir.rs | very likely | 16:27:37 |
dramforever | you can wait for an invite coming any second now | 16:27:46 |
[0x4A6F] | What's your GitHub username? | 16:29:27 |
@lotte:chir.rs | DarkKirb | 16:31:03 |
[0x4A6F] | Can't invite you: Not a member of this organisation | 16:32:07 |
@lotte:chir.rs | makes sense | 16:32:23 |
| 29 Jun 2025 |
| @jonhermansen:matrix.org joined the room. | 19:11:11 |
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| 30 Jun 2025 |
| 17lifers (Ryan) changed their profile picture. | 14:49:49 |
| 1 Jul 2025 |
| Pratham Patel (you can mention me) changed their display name from Pratham Patel (you can mention me) to Pratham Patel. | 05:10:24 |
| @lotte:chir.rs changed their profile picture. | 08:42:14 |
| zimward joined the room. | 18:48:47 |
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| 2 Jul 2025 |
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| 4 Jul 2025 |
| Simon Kammermeier changed their display name from k49 to Simon Kammermeier. | 11:06:37 |
@jonhermansen:matrix.org | I'd like one, if possible! I am interested in helping test and fix issues on RISC-V. I am looking into setting up qemu-user locally myself, since I don't have physical hardware at the moment. I should already be a part of NixOS org, I got added yesterday.
https://github.com/jonhermansen/ | 19:03:09 |
| 6 Jul 2025 |
| Kazani joined the room. | 02:27:24 |
| Kazani changed their display name from Ohin "Kazani" to Kazani. | 02:27:41 |
| 7 Jul 2025 |
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| 8 Jul 2025 |
zimward | i was thinking about what it would take to setup a official builder to populate the cache with riscv packages together with rtunreal. so far we thought about either one or two milkv pioneer boards or a cluster of Systems on a module like the one from milkv or simmilar in a 1 or 2 U chassis. whats the general stance about setting up something like this? also im not sure what the impact of GhostWrite is on compiling (ie how bad it disableing vector is for the performance), any input is appreciated. | 18:48:18 |
zimward | Redacted or Malformed Event | 18:48:18 |
Tristan Ross | I like it, I think it would be great for someone to bring this up with the NixOS hardware team. I've been wanting this to happen. If there's more motivation outside the team, I can support it. | 19:15:32 |
rtunreal | We would try to get in touch and plan/set up the infrastructure for this to happen. We also would want to have the opinions of people like Nick Cao and misuzu (who currently host the biggest Risc-V cache?) so we could have their opinion and coordinate a smooth roll-over, as we don't want to do it over their head. | 19:19:04 |
zimward | getting in touch with the infra team would probably also good to get some knowledge about the current requirements of the builders (as in storage, peak memory usage of jobs, etc) | 19:22:18 |
Tristan Ross | I just know that at least on the HW team side of things, we've floated ideas for Hydra and caches. RISC-V is a big thing I want to see supported because it's newer and isn't supported well right now by nixpkgs. | 19:27:07 |