https://lore.kernel.org/lkml/CAHk-=whVpSHw9+4ov=oLevfv8sPYbh59T_9VKif-6Vqkr41jQA@mail.gmail.com/T/#u

riscv: dts: starfive: jh7110-common: Fix lower rate of CPUfreq
by setting PLL0 rate to 1.5GHz
Yes please

https://lore.kernel.org/lkml/CAHk-=whVpSHw9+4ov=oLevfv8sPYbh59T_9VKif-6Vqkr41jQA@mail.gmail.com/T/#u

riscv: dts: starfive: jh7110-common: Fix lower rate of CPUfreq
by setting PLL0 rate to 1.5GHz

Yes please

misuzu@nixos ~ % lsblk
NAME        MAJ:MIN RM   SIZE RO TYPE MOUNTPOINTS
mtdblock0    31:0    0   960K  0 disk
mtdblock1    31:1    0    64K  0 disk
mtdblock2    31:2    0    15M  0 disk
zram0       252:0    0   3.9G  0 disk [SWAP]
nvme0n1     259:0    0 232.9G  0 disk
├─nvme0n1p1 259:1    0     2M  0 part
├─nvme0n1p2 259:2    0    16M  0 part
├─nvme0n1p3 259:3    0     1G  0 part /boot
└─nvme0n1p4 259:4    0 231.9G  0 part /nix/store
                                      /
misuzu@nixos ~ % uname -a
Linux nixos 6.11.0-rc7 #1-NixOS SMP Tue Jan  1 00:00:00 UTC 1980 riscv64 GNU/Linux

In reply to @alex:tunstall.xyz
Oh PCIe is in 6.11, which isn't stable yet.
https://rvspace.org/en/project/JH7110_Upstream_Plan

Support for cross-compiling GHC has been merged into Nixpkgs, so it is now possible to boot RISC-V GHC by cross-compiling from a supported platform.
fgaz this might have broken your ShellCheck fix, because GHC now claims that it supports all platforms even though it cannot be evaluated on exotic platforms unless a boot compiler is provided.

Next step: adding boot GHC binaries for RISC-V (and maybe some other platforms) to remove the need to cross-compile; these binaries can now be built entirely from Nixpkgs and upstream binaries.